Cool Cores: thermal management for next-generation computing systems through a cross-stack approach

This research project aims to characterize and optimize many-core CPUs for high thermal-density environments.

Deadline for Application

The deadline to submit your first-stage application form is 11 December 2025.

You must follow the CDT MLSystems application process as described in those webpages

Please contact the project's PI ahead of submitting your application to first check suitability and interest.

Co-funding Company

Imec 

Imec is the world's leading independent nanoelectronics R&D hub. The combination of our talent, infrastructure, and partner network enables breakthroughs towards microchips that are smaller, faster, more affordable, and more sustainable. We combine that nanotech expertise with data and AI to create and support applications for a smarter, better future.

Imec R&D, nano electronics and digital technologies

Supervisory team

University of Edinburgh PI: Professor Boris Grot - boris.grot@ed.ac.uk (School of Informatics)
Personal website: https://homepages.inf.ed.ac.uk/bgrot/
Watch an interview of Boris Grot

Company supervisor: Matthew Walker – matthew.walker@imec-int.com

Abstract

Thermal challenges due to increasing power density in modern many-core CPUs limit system performance and predictability. New technologies like 3D stacking and backside power delivery offer performance gains but introduce complex thermal trade-offs that require novel thermal management strategies at both the hardware and software levels.

This research project aims to characterize and optimize many-core CPUs for high thermal-density environments. The project will begin by characterizing existing many-core server CPUs running state-of-the-art server workloads to demonstrate performance variability and throttling due to thermal effects. Next, we will design and implement new hardware and software techniques for thermal-aware workload scheduling, placement, hardware-assisted migration, and runtime thermal management. Finally, we will investigate thermal-aware component placement and floor-planning strategies for CPUs using state-of-the-art technology models from IMEC to validate and demonstrate the effectiveness of our proposed solutions.

Project Background

Technology scaling is pushing the limits of power density in modern systems and this is leading to a number of emerging technologies to support the demand for AI workloads, including heterogeneous 3D stacking, Backside Power Delivery Networks (BSPDNs), high density bonding technologies, vertically stacked CFET transistors, and micro-fluidic cooling solutions. These new technologies each come with unique design-time and run-time thermal implications. Full stack system-technology co-optimisation is required, and machine learning techniques provide an opportunity for optimising this vast design space that spans multiple abstraction-levels.

Imec is the world's leading non-profit semiconductor research centre with leading edge semiconductor fabs. Imec defines the semiconductor roadmap and collaborates with the major technology companies and many startups and universities. Its research interests range from sub-nanometre transistors to integrated photonics, 3D chiplets and novel cooling approaches. Imec Cambridge focusses on system-technology co-optimisation and AI system simulation. 

Expected Outcome and Impact

A cross-stack (software, architectural and microarchitectural) set of solutions for characterizing, modelling and overcoming thermal challenges in future-generation CPUs and SoCs.

Students Requirements

To apply for this PhD project, you should have a good understanding of computer architecture and operating systems and some strong software development skills manifested through open-source projects, hackathons and/or programming-focused internships. You should be willing to “roll up the sleeves” and dive into complex code and have an interest in performance analysis and modelling methodologies. You should be highly motivated, self-directed and curious.