PhD studentship in Quantum Error Correction for Superconducting Qubit Hardware

Deadline: 31st January 2026 (or until position is filled)

A fully funded four-year PhD position is available to work on the project titled “Fault-Tolerant Architectures for Superconducting Qubit Quantum Computers”. This position is a collaborative studentship between the University of Edinburgh and the National Quantum Computing Centre. The position will be registered and hosted at the University of Edinburgh and will be jointly supervised by:

  • Dr Joschka Roffe, School of Informatics, University of Edinburgh
  • Dr Stergios Koutsioumpas, School of Informatics, University of Edinburgh
  • Dr Vivek Chidambaram, National Quantum Computing Centre (NQCC), Harwell, Oxfordshire
  • Dr Aneirin Baker, National Quantum Computing Centre (NQCC), Harwell, Oxfordshire

Over the course of the studentship the student will be offered a minimum of three months to work at the NQCC to apply their research within the national labs framework.

This position is part of an annual NQCC cohort of 6 collaborative studentships, in which the projects have been co-developed by the NQCC and different academic institutes across the UK. The scheme will include cohort-based training and activities, enabling students to gain wider skills and develop valuable personal and professional networks.

Project Background

The UK National Quantum Strategy sets out the goal to deliver operationally useful quantum computers by 2035, with an interim target of developing MegaQuop-capable devices by 2028. Among the leading modalities, superconducting qubits stand out for their high gate fidelities, fast gate speeds, and the advantage of a well-established supply chain for experimental infrastructure and control systems.

Scaling superconducting qubit quantum computing systems is challenging due many factors including their susceptibility to errors. For context, state-of-the-art superconducting quantum computers still fail in over one in a hundred operations, making them significantly less reliable than classical CPUs using transistor-based gates, where error rates are commonly less than one in a hundred trillion.

Quantum error correction (QEC) offers a powerful suite of system-level techniques designed to enable reliable quantum computation despite imperfect qubit gate operations. The core idea is to distribute the information encoded in a single qubit across multiple qubits, creating a so-called logical qubit. QEC protocols operate by continuously measuring and validating correlations between the physical qubits that make up each logical qubit. Deviations from the expected correlations represent errors. These can be detected without measuring (and thus collapsing) the qubit state, and associated errors can be precisely located and corrected.

Logical qubits are set to become the fundamental building blocks of scalable quantum computers, enabling groundbreaking applications beyond the capabilities of conventional computing technologies. December 2024 marked a major inflection point when Google Quantum AI demonstrated the first surface code logical qubit operating below the breakeven threshold on a 105-qubit superconducting processor. This milestone offers conclusive proof that practical quantum error correction (QEC) is possible. However, moving from isolated demonstrations to large-scale, fault-tolerant quantum computers introduces new architectural and engineering challenges.

Critical questions include how to design modular architectures that distribute computation across multiple superconducting QPU modules, how to realise fault-tolerant logical operations both within and between these modules, and how to integrate these systems seamlessly with control hardware, cryogenic infrastructure, and quantum operating systems.

Addressing these challenges requires considering large-scale architecture from the outset of QPU design. For instance, the choice of QEC code determines physical qubit connectivity requirements, directly shaping hardware layouts. In parallel, software tools that model and benchmark different architectural strategies under realistic noise and hardware constraints are essential. They allow hardware teams to make data-driven design choices early, reduce risk, and accelerate the delivery of scalable superconducting platforms.

Project Description

As part of this PhD project, you will be at the forefront of blueprinting quantum error correction architectures for superconducting qubit quantum computers. You will develop bespoke QEC schemes for the superconducting modality, and model how these can be combined into modular architectures to support computation over millions of qubits. This will involve extensive hardware-software co-design, including the creation of design automation software tools for QEC protocol optimisation, compilation, and resource estimation.  

This PhD position will allow you to contribute directly to the NQCC’s strategic roadmap to manufacture MegaQuop-capable fault-tolerant systems with the superconducting qubit modality. The project is highly interdisciplinary, blending cutting-edge concepts from computer science, mathematics, physics, and engineering. Upon completion, you will have acquired a diverse skill set in practical quantum computing design that is highly sought after in the quantum computing sector, both in academia and industry.

Candidate’s profile

  • Knowledge of quantum computing and an understanding of challenges of building large-scale systems
  • Programming skills in Python
  • A good Bachelor’s Hons degree (2.1 or above or international equivalent) and/or Master’s degree in a relevant subject (physics, mathematics, engineering, computer science, or related subject)
  • Proficiency in English (both oral and written)
  • Programming skills in C/C++, Rust or other relevant low-level languages is desirable
  • Experience programming GPUs, FPGAs, ASICs or other specialised hardware is desirable

Studentship and eligibility

The studentship covers:

  • Full time PhD tuition fees for a student with a Home fee status (£5,006* per annum)
  • A tax free stipend of £24,780 per year
  • A generous support package to fund relevant equipment and travel

*Rates are for 25/26 as 26/27 rates not yet confirmed

Application Information

Applicants should apply via the University’s admissions portal (EUCLID) for the PhD programme of the LFCS group in the School of Informatics: https://study.ed.ac.uk/programmes/postgraduate-research/493-informatics-lfcs-theory-and-foundations-of-computer-science with a start date of 01 September 2026.

Applicants should state “UoE/NQCC Fault-Tolerant Architectures for Superconducting Qubit Quantum Computers” and the research supervisor (Joschka Roffe) in their application and Research Proposal document. 

Complete applications submitted by 31st January will receive full consideration; after that date applications will be considered until the position is filled. The anticipated start date is 01 September 2026 but later start dates can be considered.

Applicants must submit:

  • All degree transcripts and certificates (and certified translations if applicable)
  • Evidence of English Language capability (where applicable)
  • A short research proposal (max 2 pages)
  • A full CV and cover letter describing your background, suitability for the PhD, and research interests (max 2 pages)
  • Two references (note that it the applicant’s responsibility to ensure reference letters are received before the deadline)

Only complete applications (i.e. those that are not missing the above documentation) will progress forward to Academic Selectors for further consideration. 

Environment

The School of Informatics is one of the largest in Europe and currently the top Informatics institute in the UK for research power, with 40% of its research outputs considered world-leading (top grade), and almost 50% considered top grade for societal impact. The University of Edinburgh is constantly ranked among the world’s top universities and is a highly international environment with several centres of excellence.